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P r o d u c t In n o v a t i nnova PA03, IPA03A o n FFr roomm
PA03 * PA03A PA03 * PA03A
Power Operational Amplifiers
FEATURES
* MO-127COPPERPOWERDIPTMPACKAGE * HIGHINTERNALPOWERDISSIPATION --500watts * HIGHVOLTAGEOPERATION--75V * VERYHIGHCURRENT--30amps * INTERNALSOAPROTECTION * OUTPUTSWINGSCLOSETOSUPPLYRAILS * EXTERNALSHUTDOWNCONTROL
APPLICATIONS
* LINEARANDROTARYMOTORDRIVES * YOKE/MAGNETICFIELDDEFLECTION * PROGRAMMABLEPOWERSUPPLIESto68V * TRANSDUCER/AUDIOTO1000W
TYPICALAPPLICATION
+VS
12-PINDIP PACKAGESTYLECU
POSITION FEEDBACK RBAL
DESCRIPTION
The super power PA03 advances the state of the art in both brute force power and self protection against abnormal operating conditions. Its features start with a copper dip package developed by Apex Precision Power to extend power capabilities well beyond those attainable with the familiar TO-3 package. The increased pin count of the new package provides additional control features, while the superior thermal conductivity of copper allows substantially higher power ratings. The PA03 incorporates innovative current limiting circuits limiting internal power dissipation to a curve approximating the safe operating area of the power transistors. The internal current limit of 35A is supplemented with thermal sensing which reduces the current limit as the substrate temperature rises. Furthermore, a subcircuit monitors actual junction temperatures and with a response time of less than ten milliseconds reduces the current limit further to keep the junction temperature at 175C. The PA03 also features a laser trimmed high performance FET input stage providing superior DC accuracies both initially and over the full temperature range.
+5V SHUT DOWN 0/10V DAC R1 DESIRED POSITION + +S
OBJECT TOOL
-S PA03 - -VS C1 R2
EQUIVALENT 8 +V SCHEMATIC 11 BAL
12
The PA03 output power stages contain fast reverse recovery diodes for sustained high energy flyback protection. This hybrid integrated circuit utilizes thick film resistors, ceramic capacitors and silicon semiconductors to maximize reliability, minimize size and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The MO-127 Copper, 12-pin Power DipTM package (see Package Outlines), is hermetically sealed and isolated from the internal circuits. Insulating washers are not recommended. IMPORTANT: Observe mounting precautions.
Q1 Q4
BAL D1 Q2 Q5 Q17 Q20 A Q20 B Q3 Q12 4 +SHUT Q18 DOWN Q22 3 -SHUT DOWN Q14 9 COMP 10
Q6 Q7
Q9
D2
Q16 Q19 Q24 Q30 Q26
+ 7 6 -
1
-
OUT
2
+ Q31
Q29 D4 Q34
D3
Q32
5
-V
PA02U
http://www.cirrus.com
Copyright (c) Cirrus Logic, Inc. 2009 (All Rights Reserved)
MAY 2009 1 APEX - PA03UREVJ
PA03 * PA03A
ABSOLUTEMAXIMUMRATINGS
P r o d u c t I n n o v a t i o nF r o m
SUPPLY VOLTAGE, +VS to -VS OUTPUT CURRENT, within SOA POWER DISSIPATION, internal INPUT VOLTAGE, differential INPUT VOLTAGE, common mode TEMPERATURE, pin solder-10s TEMPERATURE, junction1 TEMPERATURE RANGE, storage OPERATING TEMP. RANGE, case SHUTDOWN VOLTAGE, differential SHUTDOWN VOLTAGE, common mode TEST CONDITIONS 2 TC = 25C Full temperature range TC = 25C Full temperature range TC = 25C TC = 25C TC = 25C TC = 25C TC = 25C Full temperature range Full temp. range, VCM = 20V Full temperature range Full temp. range, amp enabled Full temp. range, amp disabled Full temp. range, full load TC = 25C, full load TC = 25C, IO = 15A, VO = 88VPP Full temp. range, CC = 1.8nF TC = 25C, IO = 30A Full temp. range, IO = 12A Full temp. range, IO = 146mA TC = 25C TC = 25C, 10V step TC = 25C, CC - open Full temp. range, AV = 1 TC = -25C, disable TC = -25C, operate Full temperature range TC = 25C Full temperature range Full temp. range, F>60Hz Full temp. range, F<60Hz Full temperature range Sustained operation Meets full range specification MIN PA03 TYP .5 10 8 20 5 .01 2.5 1011 6 VS -10V 86 3.5 92 102 1 30 65 6.2 4.2 3.5 8 8 2 10 20 15 50 125 25 .22 .25 14 - 25 75 300 40 .28 .3 150 85 108 100 .85 MAX 2 30 50 50
150V Internally limited 500W 25V VS 300C 175C -65 to +150C -55 to +125C 5V VS MIN PA03A TYP .25 5 * 10 3 * 1.5 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * MAX .5 10 10 10 UNITS mV V/C V/V V/W pA pA/V pA pF V dB A V V dB MHz kHz V V V A s V/s nF s s V mA mA C/W C/W C/W C C
SPECIFICATIONS
PARAMETER INPUT OFFSET VOLTAGE, initial OFFSET VOLTAGE, vs. temperature OFFSET VOLTAGE, vs. supply OFFSET VOLTAGE, vs. power BIAS CURRENT, initial BIAS CURRENT, vs. supply OFFSET CURRENT, initial INPUT IMPEDANCE, DC INPUT CAPACITANCE COMMON MODE VOLTAGE RANGE3 COMMON MODE REJECTION, DC SHUTDOWN CURRENT4 SHUTDOWN VOLTAGE SHUTDOWN VOLTAGE GAIN OPEN LOOP GAIN at 10Hz GAIN BANDWIDTH PRODUCT at 1MHz POWER BANDWIDTH PHASE MARGIN OUTPUT VOLTAGE SWING3 VOLTAGE SWING3 VOLTAGE SWING3 CURRENT, peak SETTLING TIME to .1% SLEW RATE CAPACITIVE LOAD SHUTDOWN DELAY POWER SUPPLY VOLTAGE CURRENT, quiescent6 CURRENT, disable mode THERMAL RESISTANCE, AC junction to case5 RESISTANCE, DC junction to case RESISTANCE, junction to ambient TEMPERATURE, junction TEMPERATURE RANGE, case
VS -7 VS -5 VS -4 30
* * * *
NOTES: * The specification of PA03A is identical to the specification for PA03 in applicable column to the left. 1. Long term operation at the maximum junction temperature will result in reduced product life. Derate power dissipation to achieve high MTTF. 2. The power supply voltage for all specifications is the TYP rating unless noted as a test condition. 3. +VS and -VS denote the positive and negative supply rail respectively. Total VS is measured from +VS to -VS. 4. Rating applies if both shutdown inputs are least 1V inside supply rails. If one of the shutdown inputs is tied to a supply rail, the current in that pin may increase to 2.4mA. 5. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. 6. The PA03 must be used with a heatsink or the quiescent power may drive the unit into thermal shutdown.
2
PA02U
P r o d u c t I n n o v a t i o nF r o m
PA03 * PA03A
INTERNAL POWER DISSIPATION, P(W)
NORMALIZED BIAS CURRENT, IB (X)
500 400 300 200 100 0
POWER DERATING
256 64 16 4 1 .25 .06 -15
BIAS CURRENT
50 40 30 20 10
CURRENT LIMIT
CURRENT LIMIT, ILIM (A)
5 45 65 85 25 CASE TEMPERATURE, TC (C) 105
0
40 80 120 160 200 CASE TEMPERATURE, TC (C)
0 -50 -25 0 25 50 75 100 125 CASE TEMPERATURE, TC (C) 7
SMALL SIGNAL RESPONSE
120 0 100 80 -30
PHASE RESPONSE
VOLTAGE DROP FROM SUPPLY (V)
CC =O
OUTPUT VOLTAGE SWING
CC
OPEN LOOP GAIN, A (dB)
6 5 4 3 2 1 0
PHASE, ()
-60 -90 -120 -150
TC
=-
55
C
=1 80
PE N
0p F
60 40 20 0 -20 1 10 CC = 470pF
100 1K 10K .1M 1M 10M FREQUENCY, F (Hz)
COMMON MODE REJECTION, CMR (dB)
100 80
5.0 2.5
INPUT NOISE VOLTAGE, VN (nV/Hz)
120
COMMON MODE REJECTION
VOLTS
= CC O PE N
= CC 18 00 pF
TC
=2
5C
-180 -210 1 10 100 1K 10K .1M 1M 10M FREQUENCY, F (Hz)
TC
=1
25
C
5 20 25 10 15 OUTPUT CURRENT, IO (A)
30
7.5
PULSE RESPONSE
VIN = .5V, AV = 10 RL =.5
20
INPUT NOISE
10
60 40 20 0
0 -2.5 -5.0 -7.5
6
4
1
10
100 1K 10K .1M FREQUENCY, F (Hz)
1M
0
5
10
15 20 TIME, t (S)
25
30
2
10
100 10K 1K FREQUENCY, F (Hz)
.1M
1.0 0.3
HARMONIC DISTORTION
VS = 50V AV = 10 PO = 200W RL = 4
1.4 1.2
QUIESCENT CURRENT
OUTPUT VOLTAGE, VO (VP-P)
150 100
POWER RESPONSE
NORMALIZED, IQ (X)
TC
1.0 .8 .6 .4
25 =1
C
DISTORTION, (%)
0.1 .03 .01
TC
=2
5C
CC
TC
TC = 8 5C
=-
25
C
PE =O
CC
50 40 30 20
=4
80 F 0p
CC =1
N
pF 70
.003 30
100
300 1K 3K 10K 30K FREQUENCY, F (Hz)
40 60 80 100 120 140 TOTAL SUPPLY VOLTAGE, VS (V)
10
3K 5K
10K 50K 100K FREQUENCY, F (Hz)
300K
PA02U
3
PA03 * PA03A
P r o d u c t I n n o v a t i o nF r o m
CAUTION
OUTPUT CURRENT FROM +VS OR -VS (A)
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850C to avoid generating toxic fumes.
SOA
40 30
CURRENT LIMIT ZONE
TH
ER
EXTERNALCONNECTIONS
-INPUT +INPUT -SHUT DN +SHUT DN -SUPPLY -OUTPUT 1 2 3 4 5 6 12 11 10 9 8 7 BALANCE CONTROL BALANCE CONTROL PHASE COMP. PHASE COMP. +SUPPLY +OUTPUT Pins 6 & 7 must be connected together. If unused, tie Pins 11 & 12 to +SUPPLY. IMPORTANT: OBSERVE MOUNTING PRECAUTIONS. REVERSE INSERTION WILL DESTROY UNIT.
MA
100
L
mS
1.0
10
mS
10 5
TC = 25C
mS
dc
SE CO ND
TOP VIEW
BR EA KD OW N
1 10
20 50 100 150 SUPPLY TO OUTPUT DIFFERENTIAL VS -VO (V)
GENERAL
Please read Application Note 1 "General Operating Considerations" which covers stability, supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.cirrus.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit; heat sink selection; Apex Precision Power's complete Application Notes library; Technical Seminar Workbook; and Evaluation Kits.
BALANCECONTROL
The voltage offset of the PA03 may be externally adjusted to zero. To implement this adjustment install a 100 to 200 ohm potentiometer between pins 11 and 12 and connect the wiper arm to the positive supply. Bypass pins 11 and 12 each with at least a .01F ceramic capacitor. If the optional adjust provision is not used, connect both pins 11 and 12 to the positive supply.
MOUNTINGPRECAUTIONS
The PA03 copper base is very soft and easily bent. Do not put any stress on the mounting ears of this package. This calls for caution when pushing the amplifier into certain types of packaging foam and particularly when inserting the device into a socket. Insert the amplifier into the socket only by pushing on the perimeter of the package lid. Pushing the unit into the socket by applying pressure to the mounting tabs will bend the base due to the high insertion force required. The base will then not contact the heatsink evenly resulting in very poor heat transfer. To remove a unit from a socket, pry the socket away from the heatsink so that the heatsink will support the amplifier base evenly. Recommended mounting torque is 8-10 in.-lbs. (.9-1.13 N*m).
OUTPUTSTAGESHUTDOWN
The entire power stage of the PA03 may be disabled using one of the circuits shown in Figure 1. There are many applications for this function. One is a load protection based on power delivered to the load or thermal rise. Another one is conservation of power when using batteries. The control voltage requirements accommodate a wide variety logic drivers. 1. CMOS operating at +5V can drive the control pins directly. 2. CMOS operating at greater than 5V supplies need a voltage divider. 3. TTL logic needs a pull up resistor to +5V to provide a swing to the fully disabled voltage (3.5V). When not using the shutdown feature, connect both pins 3 and 4 to common.
SAFEOPERATINGAREA(SOA)
Due to the internal (non-adjustable) current limit of the PA03, worst case power dissipation calculations must assume current capability of 46 amps. Application specific circuits should be checked against the SOA curve when relying upon current limit for fault protection.
PHASECOMPENSATION
At low gain settings an external compensation capacitor is required to insure stability. In addition to the resistive feedback network, roll off or integrating capacitors must also be considered. A frequency of 1 MHz is most appropriate to calculate gain. Operation at gains below 10, without the external compensation capacitor opens the possibility of oscillations near output saturation regions when under load, the improper operation of the thermal shutdown circuit. This can result in amplifier destruction. At gains of 10 or more: 1. No external components are required. 2. Typical slew rate will be 8V/s. 3. Typical phase margin will be 70.
SAFEOPERATINGAREACURVES
Second breakdown limitations do apply to the PA03 but are less severe, since junction temperature limiting responds within 10ms. Stress levels shown as being safe for more than 10ms duration will merely cause thermal shutdown. Under normal operating conditions, activation of the thermal shutdown is a sign that the internal junction temperatures have reached approximately 175C. Thermal shutdown is a short term safety feature. If the conditions remain that cause thermal shutdown, the amplifier will oscillate in and out of shutdown, creating peak high power stresses, destroying useful signals, and reducing the reliability of the device.
4
PA02U
P r o d u c t I n n o v a t i o nF r o m
PA03 * PA03A
At a gain of 3: 1. Connect a 470pF compensation capacitor between pins 9 and 10. 2. Typical slew rate will be 5V/s. 3. Typical phase margin will be 45. At unity gain: 1. Connect a 1.8nF compensation capacitor between pins 9 and 10. 2. Typical slew rate will be 1.8V/s. 3. Typical phase margin will be 65.
FIGURE 1a. DIRECT DRIVE OF SHUTDOWN
+5V 4 1K * 500 Q14
PA03 * NOT REQUIRED WHEN USING CMOS LOGIC
1K 3 500 Q22
0 = OPERATE 1 = SHUT DN
FIGURE 1b. HIGH VOLTAGE LOGIC INTERFACE 0 = SHUT DN 1 = OPERATE
+15V PA03 CMOS 2R 4 R 3 500 500 Q14 1K Q22
FIGURE 1c. THERMALLY ACTIVATED SHUTDOWN
+VS R1 ** R2 4.7K
4
500
Q14 1K
PA03
3 360- 400mV ** SELECT SHUTOFF TEMPERATURE SELECT R4 FOR 5V DROP ON R2 R3 360 R4 30K
500
Q22
LOAD THERMAL SENSE TRANSISTOR
ContACting CiRRUs LogiC sUPPoRt
For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact apex.support@cirrus.com. International customers can also request support by contacting their local Cirrus Logic Sales Representative. To find the one nearest to you, go to www.cirrus.com
IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs, Apex Precision Power, Apex and the Apex Precision Power logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.
PA02U
5

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